SMIC's N+3 7nm Node Shows Smaller Metal Pitch Than Intel 18A, Higher Density Than TSMC N6 Without EUV
An analysis by SemiAnalysis of Huawei's Kirin 9030 SoC reveals that SMIC's third-generation 7nm-class N+3 process achieves a minimum metal pitch of 32.5nm, nominally tighter than Intel's 18A node, and a transistor density of 113.4 million transistors per square millimeter, surpassing TSMC's N6 node. This is accomplished without EUV lithography, using DUV multi-patterning and design-technology co-optimization. However, the Kirin 9030 delivers performance comparable to flagship chips from three years ago and lags in energy efficiency versus modern Apple, Qualcomm, and MediaTek designs. The article notes that transistor density alone does not equate to overall process competitiveness, and SMIC's node still trails Intel 18A and TSMC's advanced nodes in performance and efficiency. Future nodes like N+4 and N+5 could approach TSMC N5 and Intel 18A density, but significant challenges remain.
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