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TSMC to Raise Wafer Prices 3%-6% from January 2027, Supply Chain Sources Say
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According to a report by DIGITIMES citing supply chain sources, TSMC has confirmed it will adjust wafer-out prices starting January 2027, with increases of 3% to 6% depending on process node and product. Advanced nodes such as 2nm and 3nm will see higher increases, while mature and specialty nodes will be negotiated individually based on product, capacity utilization, and customer situation. This is not the first such report; in July, a media report citing sources said TSMC planned price hikes of up to 10% from 2027. The price increase is attributed to capacity tightness driven by AI demand, which has expanded from GPUs, ASICs, and HBM to data centers and high-speed optical communication components. TSMC's 2nm and 3nm processes are in short supply, and advanced packaging orders like CoWoS are visible through 2030. Supply chain sources note that for high-end chip clients, securing capacity is more urgent than short-term price changes. TSMC Chairman C.C. Wei previously compared choosing a process technology partner to buying milk at a convenience store, emphasizing that cooperation takes about five years. Major clients like Nvidia and Apple have not changed their wafer input plans. Other foundries such as UMC and Powerchip have also announced price hikes, and packaging and IC design clients face pressure to raise their own prices. Overseas expansion costs, particularly in the US where construction costs are 4-5 times those in Taiwan, are also cited as a factor. TSMC has indicated that 2nm ramp-up will pressure gross margins by 3-4 percentage points in the second half of 2026, and overseas fabs may add 2-3 percentage points of margin pressure in early years.
Source report
According to supply chain sources cited by DIGITIMES, TSMC has confirmed plans to adjust its wafer-out pricing starting January 2027, with increases ranging from approximately 3% to 6%, depending on process node and product type.
Pricing Adjustments by Process Node
- Advanced nodes (2nm, 3nm): Higher price increases
- Mature and specialty nodes: Pricing to be negotiated on a case-by-case basis, depending on product type, capacity utilization, and customer profile
This is not the first time TSMC's 2027 price hike has been reported. In July of this year, media reports citing informed sources indicated that TSMC planned to raise foundry prices by up to 10% starting in 2027.
Capacity Constraints Remain the Core Driver
Supply chain sources noted that TSMC's 2nm and 3nm process nodes remain in short supply, while advanced packaging capacity—such as CoWoS—has order visibility extending to 2030.
The current wave of AI demand has expanded beyond GPUs, ASICs, and HBM to include data center components. As AI server shipments grow, high-speed optical communication components and other related segments are also driving broader wafer foundry production lines compared to previous years.
For some high-end chip customers, securing capacity remains a more urgent priority than short-term price fluctuations.
Customer Commitment and Long-Term Partnerships
At TSMC's July earnings call, Chairman C.C. Wei addressed the topic of customer loyalty, stating that selecting a process technology partner is not like buying milk at a convenience store—where a customer can switch stores the next day if unsatisfied. He emphasized that the entire collaboration cycle, from process selection and product design to capacity preparation and volume ramp-up, takes at least five years.
The latest report also cited supply chain sources indicating that major advanced process customers, including NVIDIA and Apple, have not shown significant changes in their wafer starts.
Ripple Effects Across the Industry
As TSMC raises prices, other foundries are expected to follow. UMC and Powerchip have already announced their own pricing strategies. In turn, packaging and testing houses, as well as IC design clients, are facing pressure to adjust their quotes. However, whether and how much they can raise prices will depend on market competition dynamics.
Overseas Expansion Costs Also a Factor
Beyond AI-driven capacity tightness, the high cost of overseas fab expansion is another reason the industry has long anticipated TSMC's price adjustments.
Supply chain estimates suggest that building a fab in the U.S. costs four to five times more than in Taiwan. TSMC has previously stated that the ramp-up of 2nm production is expected to pressure gross margins by approximately 3 to 4 percentage points in the second half of 2026, while overseas fab expansion could add an additional 2 to 3 percentage points of margin pressure in the early years. Against this backdrop, the market expects TSMC to use wafer pricing adjustments to offset the cost burden from new capacity deployment.
(Source: Cailianshe)
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TSMC to Raise Wafer Prices 3-6% from January 2027 on AI-Driven Capacity Tightness