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TSMC Reportedly to Raise Wafer Prices 3%-6% from Jan 2027, with Higher Hikes for Advanced Nodes
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A market report citing supply chain sources indicates that TSMC has decided to raise wafer-out prices by 3% to 6% starting January 2027, with higher increases for advanced nodes like 2nm and 3nm. Mature and specialty process prices will be negotiated case by case based on product, capacity utilization, and customer. This follows an earlier July report of a potential 10% hike. The price increase is attributed to persistent capacity tightness, particularly for 2nm and 3nm processes and CoWoS advanced packaging, with order visibility extending to 2030. AI demand has expanded from GPUs, ASICs, and HBM to data centers and high-speed optical communications, making capacity locking more urgent than short-term price changes for some high-end chip clients. TSMC Chairman C.C. Wei previously noted that advanced chip collaboration takes about five years. Key customers like Nvidia and Apple have not significantly changed their wafer starts. Other foundries such as UMC and Powerchip have also announced price hikes, pressuring packaging and IC design firms. Overseas expansion costs, especially in the US where construction costs are 4-5 times higher than in Taiwan, are also cited as a factor. TSMC expects 2nm ramp-up to pressure gross margins by 3-4 percentage points in H2 2026, with overseas fabs adding 2-3 percentage points of margin pressure in early years.
Source report
According to supply chain sources cited by DIGITIMES, Taiwan Semiconductor Manufacturing Company (TSMC) has confirmed plans to adjust its wafer-out pricing starting January 2027. The price increase will range from approximately 3% to 6%, depending on the process node and product type.
- Advanced nodes such as 2nm and 3nm will see higher increases.
- Mature and specialty nodes will be negotiated on a case-by-case basis, depending on product type, capacity utilization, and customer relationships.
This is not the first time TSMC's 2027 price hike has been reported. In July of this year, media reports citing知情人士 indicated that TSMC planned to raise foundry prices by up to 10% starting in 2027.
Capacity Constraints Drive the Price Adjustment
Supply chain sources attribute the price increase to ongoing capacity tightness. TSMC's 2nm and 3nm process nodes remain in high demand and short supply. Meanwhile, advanced packaging services such as CoWoS have order visibility extending into 2030.
The current wave of AI demand has expanded beyond GPUs, ASICs, and HBM to include data centers. As AI server shipments grow, high-speed optical communication components and other related segments are also driving increased demand across a broader range of wafer foundry production lines compared to previous years.
For some high-end chip customers, securing capacity remains a more urgent priority than short-term price fluctuations.
Customer Relationships and Long-Term Commitments
At TSMC's July earnings call, Chairman C.C. Wei addressed the topic of customer loyalty, stating: "Choosing a process technology partner is not like buying milk at a 7-Eleven—where if you don't like the product today, you switch to another store tomorrow." He noted that the entire collaboration cycle—from process selection and product design to capacity preparation and volume ramp-up—takes at least five years.
The latest report also indicates that major advanced process customers, including NVIDIA and Apple, have not shown significant changes in their wafer starts.
Ripple Effects Across the Industry
As TSMC raises prices, other foundries are expected to follow suit. United Microelectronics Corporation (UMC) and Powerchip Semiconductor Manufacturing Corporation (PSMC) have already announced their own pricing strategies.
The price increases are also likely to affect downstream players. Packaging and testing houses, as well as IC design customers, face pressure to adjust their own pricing. However, whether they can pass on the increases—and by how much—will depend on market competition dynamics.
Overseas Expansion Costs Add Pressure
Beyond AI-driven capacity tightness, the high cost of overseas fab expansion is another factor behind TSMC's pricing adjustment, which the industry had long anticipated.
Supply chain estimates suggest that building a fab in the United States costs four to five times more than building one in Taiwan. TSMC has previously stated that the ramp-up of 2nm production is expected to pressure gross margins by approximately 3 to 4 percentage points in the second half of 2026. Additionally, overseas fab expansion may add another 2 to 3 percentage points of gross margin pressure in the early years.
Against this backdrop, the market expects TSMC to use wafer pricing adjustments to offset the cost pressures associated with new capacity deployment.
Source: Cailianshe
Source
东方财富网-媒体头条Eastern
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TSMC to Raise Wafer Prices 3-6% from January 2027 on AI-Driven Capacity Tightness