AMD unveils MI455X AI accelerator and Helios rack-scale architecture to rival Nvidia

At AMD's Advancing AI event this week, the company disclosed further details about its upcoming MI455X GPU and the Helios rack-scale architecture. The system will integrate 72 GPUs into a coherent accelerator—the largest such system AMD has built to date and its first to directly compete with Nvidia's NVL72 rack-scale design used in the Blackwell and Rubin generations.

AMD describes the MI455X as "by leaps and bounds the most advanced AI accelerator we've ever built." Based on available information, it represents AMD's most competitive offering at both the chip and rack-scale levels against Nvidia's dominant position in the AI compute market.

Chip Architecture and Packaging

The MI455X GPU is a massive chip containing 320 billion transistors, constructed using advanced packaging technologies:

• Four Accelerator Complex Dies (XCDs) are stacked on top of each Fabric and Cache Die (FCD) using hybrid bonding
• Two FCDs are each connected to six stacks of HBM4, two I/O dies, and to one another using TSMC's CoWoS-L technology

This chiplet design allows AMD to use the most advanced TSMC 2N gate-all-around (GAA) process technology on the XCDs, where it provides the greatest power and performance benefits. The FCDs and I/O dies, which contain elements that do not benefit from denser process technologies, are fabricated on TSMC N3P.

CDNA 5 Architecture Changes

CDNA 5 represents a significant shift in the CDNA architecture. AMD now refers to the fundamental building block of the CDNA 5 Accelerator Complex Die as a "Work Group Processor" (WGP) instead of a "Compute Unit," though the basic layout of the XCD remains largely similar.

The MI455X maintains the same number of WGPs as the MI355X at 256. Since the fundamental compute resources have not changed, per-WGP throughput on the CDNA 5 MI455X must be substantially higher to deliver its significant performance gains.

Wavefront Size Change

Among the notable changes, CDNA 5 introduces a major shift in the programming model for Instinct GPUs:

• Wavefront width is now 32 instead of 64
• AMD states this improves instruction latency, branch divergence penalties, and register pressure
• A 32-wide approach increases architectural flexibility for interacting with different tensor tile sizes and mapping compute kernels to hardware
• RDNA GPUs have used a native wavefront size of 32 since their introduction

Performance Improvements

CDNA 5 delivers substantial compute performance enhancements over CDNA 4, theoretically doubling and in some cases quadrupling peak FLOPS. The MI455X particularly benefits lower-precision floating-point formats now common for inference workloads. OCP MXFP8 and MXFP4 formats are theoretically up to 4X faster than on the CDNA 4 MI355X.

MI455X Peak FLOPS Comparison

| Format | Instinct MI355X | Instinct MI455X | Nvidia Rubin | |--------|----------------|----------------|--------------| | NVFP4 (dense) | -- | -- | 35 PF | | OCP MXFP4 | 10 PF | 40.26 PF | -- | | OCP MXFP6 | 10 PF | 20.13 PF | 17.5 PF | | OCP MXFP8 | 10 PF | 20.13 PF | 17.5 PF | | Matrix FP16/BF16 | 2.5 PF | 5.03 PF | 4 PF | | Vector FP16 | 157.3 TF | 315 TF | -- | | Matrix FP32 | 157.3 TF | 315 TF | 400 TF | | Vector FP32 | 157.3 TF | 315 TF | 130 TF |

On paper, the MI455X offers peak performance exceeding what Nvidia has shown for Rubin so far. Combined with the Helios rack-scale architecture—which finally provides AMD with the same 72-GPU coherent domain as Nvidia's NVL72—AMD is more competitive in the AI data center capacity race than ever before. This is translating into real customer wins, with AMD announcing pivotal deals with Microsoft and Anthropic this week.

Caveats and Software Challenges

AMD advises caution when drawing conclusions from head-to-head peak FLOPS comparisons. As AMD itself acknowledged, realized performance of these GPUs in real-world applications is likely to be significantly lower. The ongoing challenge remains optimizing software and applications to achieve as much of that theoretical performance as possible.

Additional Improvements

Beyond general compute enhancements, AMD is highlighting improved transcendental math performance from the CDNA 5 Transcendental Unit, which has broad implications for performance on essential AI functions including:

• Softmax
• Neural network activations
• Attention mechanisms

AMD reports that the CDNA 5 Transcendental Unit doubles throughput compared to CDNA 4.