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TechAMD splits Zen 7 into three EPYC families for 2028, extends product cadence to 2030
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At its Advancing AI 2026 event in San Francisco, AMD launched sixth-gen EPYC 'Venice' processors, Instinct MI400 Series GPUs, and Helios rack-scale systems. The company confirmed that the upcoming Zen 7 generation, arriving in 2028, will be split into three distinct EPYC families: Florence (fresh Zen 7 cores with AI extensions), Ferrara (AI host node CPU for Helios 600 racks), and Fidenza (agentic sandbox product). AMD extended its annual CPU, GPU, networking, and rack cadence out to 2030, and estimated its total addressable market at roughly $2 trillion. The company introduced a new competitive metric claiming the most AI agents per watt, per dollar, and per rack, though these estimates are based on CPU thread resources as a proxy. AMD also replaced TDP with 'Default CPU Power' starting with sixth-gen EPYC. Helios racks pairing 72 MI455X GPUs with 18 Venice CPUs are now in production.
Source report
San Francisco — AMD used its recent Advancing AI 2026 event to launch sixth-generation EPYC "Venice" processors, Instinct MI400 Series GPUs, and Helios rack-scale systems. The company also confirmed that the Zen 7 generation, arriving in 2028, will launch as three separate EPYC families rather than a single lineup.
Three Zen 7 CPU Families Named
AMD named the three Zen 7 families — Florence, Ferrara, and Fidenza — in its launch release. The company extended its annual CPU, GPU, networking, and rack cadence out to 2030 and projected its total addressable market at roughly $2 trillion by 2030.
- Florence features fresh Zen 7 cores, a new set of AI compute extensions, and support for newer memory technologies, according to AMD Chair and CEO Lisa Su.
- Ferrara serves as the AI host node portion and reappears later in the roadmap as the CPU inside the Helios 600 rack alongside MI600 Series GPUs and Pensando "Palma" and "Levanzo" networking.
- Fidenza is positioned as the agentic sandbox product.
AMD disclosed no core counts, process node, or socket details for any of the three families, stating only that Zen 7 uses "leading-edge process technology."
A Wider Generational Spread Than Before
The fourth-generation EPYC (Zen 4) spanned Genoa, Bergamo, Genoa-X, and Siena across two sockets. The fifth-generation "Turin" (Zen 5) consolidated Zen 5 and Zen 5c parts into a single 27-SKU stack on one socket. Venice restarts the fan-out with the 9006 series on the new SP7 socket, with Venice-X arriving in 2027 featuring 1,152MB of 3D V-Cache, 96 cores, and a 5.15 GHz boost clock.
Three named Zen 7 families at announcement, two years out, represents a wider generational spread than AMD has ever opened with.
New Competitive Metric: AI Agents per Watt, Dollar, and Rack
AMD introduced a competitive yardstick it has not used before, claiming the most AI agents per watt, per dollar, and per rack. However, AMD's own endnotes state that agent counts are estimated from CPU thread resources used as a proxy.
Endnote 9xx6-012 clarifies that agent counts are estimates derived from available CPU thread resources under a consistent theoretical workload, and that real capacity varies with workload, model, memory, software, orchestration, and system configuration.
- Per-rack comparison: Based on core count at a 100 kW rack power envelope, pitting the 256-core EPYC 9996 against an 88-core Nvidia Vera, AMD's own 192-core EPYC 9965, and Intel's 128-core Xeon 6980P.
- Per-dollar metric: Based on top-of-stack thread count divided by 1,000-unit list pricing.
- Per-watt comparison: Lists Nvidia Vera at 450W, Arm's AGI CPU at 300W (one thread per core), Intel's Xeon 6980P at 500W, and AMD's EPYC 9965 at 500W.
AMD had already claimed a 3.3x rack-level advantage over Vera in June.
Market Context
Mercury Research placed AMD at a record 46.2% of x86 server CPU revenue in Q1 2026, against 33.2% of units. Arm-based designs took roughly 17.7% of server shipments in the same quarter.
New Power Metric: Default CPU Power
Starting with sixth-gen EPYC, AMD has replaced TDP with a figure called Default CPU Power, defined as total power consumed across the processor's compute and I/O dies at a stated performance target. AMD says both references can serve for product comparison and performance-per-watt analysis. The endnote itself mixes conventions, quoting the EPYC 9956 at 400W Default CPU Power against TDP figures for Nvidia, Intel, and Arm parts.
Helios Racks and Forward Roadmap
Helios racks pair 72 Instinct MI455X GPUs with 18 Venice CPUs, 31TB of HBM4, and 1.4 PB/s of aggregate memory bandwidth. They are in production now.
AMD claims up to 30% more inference tokens per dollar than Nvidia's Vera Rubin NVL72, based on AMD Performance Labs estimates from July 2026 using a Kimi K2 Thinking workload at 32K input and 8K output, with hourly GPU pricing projections. The 34x token throughput gain AMD quotes for MI455X over MI355X comes from AMD's own measurements on DeepSeek V4 Flash at FP4. Both are vendor-provided benchmarks with no independent verification yet.
Forward Roadmap
| Year | GPU Series | Rack System | Networking | |------|-----------|-------------|------------| | 2027 | MI500 Series | Helios 500 (EPYC "Verano") | Pensando "Como" and "Monza" | | 2028 | MI600 Series | Helios 600 | Pensando "Palma" and "Levanzo" |
Source
Latest from Tom's HardwareNeutral / independent
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