Linux 7.2 Kernel to Support Microchip Switchtec PCIe Gen6 Switches
The upcoming Linux 7.2 kernel is set to introduce native support for Microchip's Switchtec PCIe Gen6 switches, marking a significant enhancement in hardware compatibility for high-performance computing environments. This development follows the integration of a specific patch into the PCI subsystem's 'next' Git branch, which adds the necessary device IDs for various Switchtec Gen6 SKUs. Microchip previously announced this family of switches, manufactured using a 3nm process, highlighting their capability to handle demanding workloads such as AI and machine learning training clusters, hyperscale cloud platforms, and NVMe PCIe 6.0 storage systems. The switches are available in configurations featuring up to 20 ports and 160 lanes, with some models offering 144 PCIe lanes. The inclusion of these device IDs represents the final step required to enable mainline Linux kernel support for these advanced components. As the patch has been queued in the 'next' branch, it is expected to be merged during the Linux 7.2 kernel cycle, ensuring that users can leverage the full potential of next-generation PCIe infrastructure without relying on out-of-tree drivers or manual patches.
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Linux 7.2 Kernel to Support Microchip Switchtec PCIe Gen6 Switches
The upcoming Linux 7.2 kernel is set to introduce native support for Microchip's Switchtec PCIe Gen6 switches, marking a significant enhancement in hardware compatibility for high-performance computing environments. This development follows the integration of a specific patch into the PCI subsystem's 'next' Git branch, which adds the necessary device IDs for various Switchtec Gen6 SKUs. Microchip previously announced this family of switches, manufactured using a 3nm process, highlighting their capability to handle demanding workloads such as AI and machine learning training clusters, hyperscale cloud platforms, and NVMe PCIe 6.0 storage systems. The switches are available in configurations featuring up to 20 ports and 160 lanes, with some models offering 144 PCIe lanes. The inclusion of these device IDs represents the final step required to enable mainline Linux kernel support for these advanced components. As the patch has been queued in the 'next' branch, it is expected to be merged during the Linux 7.2 kernel cycle, ensuring that users can leverage the full potential of next-generation PCIe infrastructure without relying on out-of-tree drivers or manual patches.
Phoronix