Arcane: An Assertion Reduction Framework through Semantic Clustering and MCTS-Guided Rule Exploring
Researchers have introduced Arcane, a novel framework designed to optimize Assertion-based Verification (ABV) in hardware design. While ABV is critical for ensuring hardware conforms to specifications, existing automated methods, particularly those leveraging Large Language Models, often produce excessive redundant assertions that hinder simulation efficiency. Arcane addresses this by integrating a two-tier assertion clustering method for precise semantic classification and employing Monte Carlo Tree Search (MCTS) to determine optimal rule-application sequences for reduction. Experimental evaluations using the Assertionbench dataset demonstrate that Arcane reduces assertion counts by up to 76.2% without compromising formal coverage or mutation-detection capabilities. Furthermore, the framework achieves a significant simulation speedup ranging from 2.6x to 6.1x. This development marks a substantial improvement in hardware verification workflows, offering a solution to the computational overhead caused by redundant data. The framework has been made publicly available via an anonymous repository, highlighting its potential for broader adoption in electronic design automation and AI-driven hardware verification processes.
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Arcane: An Assertion Reduction Framework through Semantic Clustering and MCTS-Guided Rule Exploring
Researchers have introduced Arcane, a novel framework designed to optimize Assertion-based Verification (ABV) in hardware design. While ABV is critical for ensuring hardware conforms to specifications, existing automated methods, particularly those leveraging Large Language Models, often produce excessive redundant assertions that hinder simulation efficiency. Arcane addresses this by integrating a two-tier assertion clustering method for precise semantic classification and employing Monte Carlo Tree Search (MCTS) to determine optimal rule-application sequences for reduction. Experimental evaluations using the Assertionbench dataset demonstrate that Arcane reduces assertion counts by up to 76.2% without compromising formal coverage or mutation-detection capabilities. Furthermore, the framework achieves a significant simulation speedup ranging from 2.6x to 6.1x. This development marks a substantial improvement in hardware verification workflows, offering a solution to the computational overhead caused by redundant data. The framework has been made publicly available via an anonymous repository, highlighting its potential for broader adoption in electronic design automation and AI-driven hardware verification processes.
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